View SG6901_4667101.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

february 2009 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 SG6901a ? ccm pfc / flyback pwm combination controller SG6901a ccm pfc/flyback pwm combination controller features ? interleaved pfc/pwm switching ? low startup and operating current ? innovative switching charge multiplier divider ? multi-vector control for improved pfc output transient response ? average-current-mode control for pfc ? programmable two-level pfc output voltage protections ? pfc and pwm feedback open-loop protection ? cycle-by-cycle current limiting for pfc/pwm ? slope compensation for pwm ? h/l line over-power compensation for pwm ? brownout protection ? over-temperature protection (otp) applications ? switching power supplies with active pfc and standby power ? high-power adaptors description the highly integrated SG6901a is designed for power supplies with boost pfc and flyback pwm. it requires very few external components to achieve versatile protections. it is available in a 20-pin sop package. a proprietary interleave-switching feature synchronizes the pfc and pwm stages and reduces switching noise. for pfc stage, the proprietary multi-vector control scheme provides a fast transient response in a low- bandwidth pfc loop, in which the overshoot and undershoot of the pfc voltage are clamped. if the feedback loop is broken, the SG6901a shuts off pfc to prevent extra-high voltage on output. for the flyback pwm, the synchronized slope compensation ensures the stability of the current loop under continuous-conduction-mode operation. built-in line-voltage compensation maintains constant output- power limit. hiccup operation during output overloading is also guaranteed. in addition, SG6901a provides protection functions, such as brownout and ri pin open/short protection. ordering information part number operating temperature range eco status package packing method SG6901asz -30c to +85c rohs 20-lead , small outline integrated circuit (soic), jedec ms013, .300 inch, wide body tape & reel for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 2 SG6901a ? ccm pfc / flyback pwm combination controller application circuit figure 1. typical application
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 3 SG6901a ? ccm pfc / flyback pwm combination controller block diagram figure 2. block diagram
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 4 SG6901a ? ccm pfc / flyback pwm combination controller marking information figure 3. top mark pin configuration figure 4. pin configuration t - s=sop p - z=lead free null=regular package xxxxxxxx - wafer lot y : year; ww : week v : assembly location
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 5 SG6901a ? ccm pfc / flyback pwm combination controller pin definitions pin # name description 1 vrms line voltage detection. the pin is used for pfc multiplier, range control of pfc output voltage, and brownout protection. for brownout pr otection, the controller is disabled after a delay time when the vrms voltage drops below a threshold. 2 ri reference setting. one resistor connected between ri and ground determines the switching frequency. the switching frequency is equal to [1560 / ri] khz, where r i is in k . for example, if r i is equal to 24k , the switching frequency is 65khz. 3 otp over-temperature protection. a constant current is output fr om this pin. an external ntc thermistor must be connected from this pin to ground. the impedance of the ntc thermistor decreases whenever the temperature increases. once the voltage of the otp pin drops below the otp threshold, the SG6901a is disabled. 4 iea pfc current amplifier output. the signal from this pin is compared with an internal sawtooth to determine the pulse width for pfc gate drive. 5 ipfc the inverting input of the pfc current amplifier. proper external compensation circuits result in excellent input power factor via average-current-mode control. 6 imp the non-inverting input of the pfc current amplifier and the output of multiplier. proper external compensation circuits results in exce llent input power factor via average-current-mode control. 7 isense current limit . a resistor from this pin to gnd sets the current limit. 8 fbpwm the control input for voltage-loop feedback of pwm stage. it is internally pulled high through a 6.5k resistance. usually an external opto-c oupler from secondary feedback circuit is connected to this pin. 9 ipwm the current-sense input for the flyback pwm. via a current sense resistor, this pin provides the control input for peak-cu rrent-mode control and cycle-by-cycle current limiting. 10 agnd signal ground. 11 ss soft start. during startup, the ss pin charges an external capacitor with a 50a (r i =24k ) constant current source. the voltage on fbpwm is clamped by ss during startup. in the event of a protection condition occurring and/or pwm being disabled, the ss pin is quickly discharged. 12 opwm the totem-pole output drive for the flyback pwm mosfet. this pin is internally clamped under 17v to protect the mosfet. 13 gnd power ground. 14 opfc the totem-pole output drive for the pfc mosfet. this pin is internally clamped under 17v to protect the mosfet. 15 vdd the power supply pin. 16 range the range pin has high impedance whenever the v rms voltage is lower than a threshold. the pfc output voltage at low line can be reduced to improve efficiency. 17 ovp the pfc stage over-voltage input. the comparator disables t he pfc output driver if the voltage at this input exceeds a threshold. th is pin can be connected to fbpfc or it can be connected to the pfc boost output through a divider network. 18 fbpfc the feedback input for pfc voltage loop. the inverting input of pfc error amplifier. this pin is connected to the pfc output through a divider network. 19 vea the error amplifier output for pfc voltage feedback loop. a compensation network (usually a capacitor) is connected between this pin and ground. a large capacitor value results in a narrow bandwidth and improves the power factor. 20 iac this input is used to provide current reference for the multiplier.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 6 SG6901a ? ccm pfc / flyback pwm combination controller absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v dd dc supply voltage 25 v i ac input ac current 2 ma v high opwm, opfc, iac -0.3 25.0 v v low others -0.3 7.0 v p d power dissipation at t a < 50 1.15 w t j operating junction temperature -40 +125 c t stg storage temperature range -55 +150 c ? jc thermal resistance (junction-to-case) +23.64 c/w t l lead temperature (soldering) +260 c human body model, jesd22-a114 4.5 kv esd electrostatic discharge capability machine model, jesd22-a115 250 v notes: 1. all voltage values, except differential voltage, are given with respect to gnd pin. 2. stresses beyond those listed under absolute maximu m ratings may cause permanent damage to the device. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a operating ambient temperature -30 +85 c
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 7 SG6901a ? ccm pfc / flyback pwm combination controller electrical characteristics v dd =15v and t a =25c unless otherwise specified. symbol parameter conditions min. typ. max. units vdd section v dd-op continuously operating voltage 20 v i dd-st startup current 0v < v dd < v dd-on 10 25 a i dd-op operating current v dd =15v; opfc, opwm open; r i =24k ? 6 10 ma v dd-on start threshold voltage 11 12 13 v v dd-off minimum operating voltage 9 10 11 v v dd-ovp v dd ovp threshold 23.5 24.5 25.5 v t d-vddovp debounce time of v dd ovp 8 25 s oscillator section f osc pwm frequency r i =24k ? 62 65 68 khz r i ri pin resistance range 15.6 47.0 k r i-open ri pin open protection if r i >r i-open , SG6901a turns off 200 k r i-short ri pin short protection if r i SG6901a turns off 2 k vrms section (for uvp and range) v rms-uvp-1 rms ac voltage under-voltage protection threshold (with t uvp delay) 0.75 0.80 0.85 v v rms-uvp-2 recovery level on v rms v rms-uvp- 1 + 0.16v v rms- uvp-1 + 0.18v v rms- uvp-1 + 0.2v v t d-pwm when uvp occurs, interval from pfc off to pwm off t uvp- min +9 t uvp- min +14 ms t uvp under-voltage protection delay time 150 195 240 ms v rms-h high v rms threshold for range comparator 1.90 1.95 2.00 v v rms-l low v rms threshold for range comparator 1.55 1.60 1.65 v t range range-enable delay time 140 170 200 ms v ol output low voltage of range pin i o =1ma 0.5 v i oh output high leakage current of range pin range=5v 50 na continued on the following page?
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 8 SG6901a ? ccm pfc / flyback pwm combination controller electrical characteristics v dd =15v and t a =25c unless otherwise specified. symbol parameter conditions min. typ. max. units pfc stage voltage error amplifier v ref reference voltage 2.95 3.00 3.05 v av open-loop gain 60 db z o output impedance 110 k ovp pfc pfc over-voltage protection (ovp pin) 3.20 3.25 3.30 v ovp pfc pfc feedback voltage protection hysteresis 60 90 120 mv t ovp-pfc debounce time of pfc ovp 40 70 120 s v fbpfc-h clamp-high feedback voltage 3.10 3.15 3.20 v g fbpfc-h clamp-high gain 0.5 a/mv v fbpfc-l clamp-low feedback voltage 2.75 2.85 2.90 v g fbpfc-l clamp-low gain 6.5 ma/mv i fbpfc-l maximum source current 1.5 2.0 ma i fbpfc-h maximum sink current 70 110 a uvp fbpfc pfc feedback under-voltage protection 0.35 0.40 0.45 v t uvp-fbpfc debounce time of pfc uvp 40 70 120 s current error amplifier v offset input offset voltage ((-) > (+)) 8 mv a i open-loop gain 60 db bw unit gain bandwidth 1.5 mhz cmrr common mode rejection ratio v cm =0 to +1.5v 70 db v out-high output high voltage 3.2 v v out-low output low voltage 0.2 v i mr1 , i mr2 reference current source r i =24k ? (i mr =20+i ri ?0.8) 50 70 a i l maximum source current 3 ma i h maximum sink current 0.25 ma continued on the following page?
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 9 SG6901a ? ccm pfc / flyback pwm combination controller electrical characteristics v dd =15v and t a =25c unless otherwise specified. symbol parameter conditions min. typ. max. units peak current limit i p constant current output r i =24k ? 90 100 110 a v rms =1.05v 0.15 0.20 0.25 v v pk peak current limit threshold voltage cycle-by-cycle limit (v sense < v pk ) v rms =3v 0.35 0.40 0.45 v t pd-pfc propagation delay 200 ns t leb-pfc leading-edge blanking time 270 350 450 ns multiplier i ac input ac current multiplier linear range 0 360 a i mo?max maximum multiplier current output r i =24k ? 250 a i mo-1 multiplier current output (low-line, high-power) v rms =1.05v; i ac =90a; v ea =7.5v; r i =24k ? 200 250 280 a i mo?2 multiplier current output (high-line, high-power) v rms =3v; i ac =264a; v ea =7.5v; r i =24k ? 65 85 a v imp voltage of imp open 3.4 3.9 4.4 v pfc output driver v z output voltage maximum (clamp) v dd =20v 16 18 v v ol-pfc output voltage low v dd =15v; i o =100ma 1.5 v t pfc interval opfc lags behind opwm at startup 9.0 11.5 14.0 ms v oh-pfc output voltage high v dd =13v; i o =100ma 8 v t r-pfc rising time v dd =15v; c l =5nf; o/p=2v to 9v 40 70 120 ns t f-pfc falling time v dd =15v; c l =5nf; o/p=9v to 2v 40 60 110 ns dcy max maximum duty cycle 93 98 % pwm stage fbpwm a v-pwm fb to current comparator attenuation 2.5 3.1 3.5 v/v z fb input impedance 4 5 7 k ? i fb maximum source current 0.8 1.2 1.5 ma fb open-loop pwm open-loop protection voltage 4.2 4.5 4.8 v t open-pwm pwm open-loop protection delay time 45 56 70 ms t open-pwm- hiccup interval of pwm open-loop protection reset 450 600 750 ms continued on the following page?
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 10 SG6901a ? ccm pfc / flyback pwm combination controller electrical characteristics v dd =15v and t a =25c unless otherwise specified. symbol parameter conditions min. typ. max. units pwm current sense t pd-pwm propagation delay to output v dd =15v, opwm<=9v 60 120 ns v limit-1 peak current limit threshold voltage1 range=open 0.65 0.70 0.75 v v limit-2 peak current limit threshold voltage2 range=ground 0.60 0.65 0.70 v t leb-pwm leading-edge blanking time 270 350 450 ns v slope slope compensation v s = v slope x (t on /t) v s : compensation voltage added to current sense 0.45 0.50 0.55 v pwm outout driver v z-pwm output voltage maximum (clamp) v dd =20v 16 18 v v ol-pwm output voltage low v dd =15v; i o =100ma 1.5 v v oh-pwm output voltage high v dd =13v; i o =100ma 8 v t r-pwm rising time v dd =15v; c l =5nf; o/p=2v to 9v 30 60 120 ns t f-pwm falling time v dd =15v; c l =5nf; o/p=9v to 2v 30 50 110 ns dcy maxpwm maximum duty cycle 73 78 83 % otp section i otp otp pin output current r i =24k ? 90 100 110 a v otp-on recovery level on otp 1.35 1.40 1.45 v v otp-off otp threshold voltage 1.15 1.20 1.25 v t otp otp debounce time 8 25 s soft start section i ss constant current output for soft-start r t =24k ? 44 50 56 a r d discharge r dson 470 ?
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 11 SG6901a ? ccm pfc / flyback pwm combination controller typical performance characteristics startup current (i dd-st ) vs. temperature 0 5 10 15 20 25 -40 -25 -10 5 20 35 50 65 80 95 110 125 t emperature (c) i dd-st (a) minimum operating voltage (v dd-off ) vs. temperature 9.0 9.4 9.8 10.2 10.6 11.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 t emperature (c) v dd-off (v) figure 5. startup current figure 6. v dd turn-off threshold voltage 4.0 5.2 6.4 7.6 8.8 10.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) operating current (i dd-op ) vs. temperature i dd-op (ma) 62 63 64 66 67 68 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) pwm frequency (f osc ) vs. temperature f osc (khz) figure 7. operating current figure 8. pwm frequency 11.0 11.4 11.8 12.2 12.6 13.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) start threshold voltage (v dd-on ) vs. temperature v dd-on (v) 23.5 23.9 24.3 24.7 25.1 25.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 v dd over-voltage protection (v dd-ovp ) vs. temperature v dd-ovp (v) temperature (c) figure 9. v dd turn-on threshold voltage figure 10. v dd ovp threshold voltage
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 12 SG6901a ? ccm pfc / flyback pwm combination controller typical performance characteristics 1.90 1.92 1.94 1.96 1.98 2.00 -40 -25 -10 5 20 35 50 65 80 95 110 125 high vrms threshold for range comparator (v rms-h ) vs. temperature v rms-h (v) temperature (c) 2.95 2.97 2.99 3.01 3.03 3.05 -40 -25 -10 5 20 35 50 65 80 95 110 125 reference voltage (v ref ) vs. temperature v ref (v) temperature (c) figure 11. high v rms threshold for range comparator figure 12. reference voltage 1.55 1.57 1.59 1.61 1.63 1.65 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) low vrms threshold for range comparator (v rms-l ) vs. temperature v rms-l (v) 40 56 72 88 104 120 -40 -25 -10 5 20 35 50 65 80 95 110 125 t r-pfc (ns) rising time (t r-pfc ) vs. temperature temperature (c) figure 13. low v rms threshold for range comparator figure 14. opfc rising time 3.20 3.22 3.24 3.26 3.28 3.30 -40 -25 -10 5 20 35 50 65 80 95 110 125 pfc over-voltage protection (ovp pfc ) vs. temperature ovp pfc (v) temperature (c) 40 54 68 82 96 110 -40 -25 -10 5 20 35 50 65 80 95 110 125 falling time (t f-pfc ) vs. temperature (c) t f-pfc (ns) temperature (c) figure 15. pfc ovp threshold voltage figure 16. opfc falling time
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 13 SG6901a ? ccm pfc / flyback pwm combination controller typical performance characteristics 93 94 95 96 97 98 -40 -25 -10 5 20 35 50 65 80 95 110 125 maximum duty cycle (dcy max ) vs. temperature dcy max (%) temperature (c) 0.65 0.67 0.69 0.71 0.73 0.75 -40 -25 -10 5 20 35 50 65 80 95 110 125 peak current limit threshold voltage 1 (v limit-1 ) vs. temperature v limit-1 (v) temperature (c) figure 17. pfc maximum duty cycle figure 18. peak current limit threshold voltage 4.20 4.32 4.44 4.56 4.68 4.80 -40 -25 -10 5 20 35 50 65 80 95 110 125 pwm open-loop protection voltage (fb open-loop ) vs. temperature fb open-loop (v) temperature (c) 0.60 0.62 0.64 0.66 0.68 0.70 -40 -25 -10 5 20 35 50 65 80 95 110 125 peak current limit threshold voltage 2 (v limit-2 ) vs. temperature v limit-2 (v) temperature (c) figure 19. pwm open-loop protection voltage figure 20. peak current limit threshold voltage2 30 46 62 78 94 110 -40 -25 -10 5 20 35 50 65 80 95 110 125 falling time (t f-pwm ) vs. temperature t f-pwm (ns) temperature (c) 73 75 77 79 81 83 -40 -25 -10 5 20 35 50 65 80 95 110 125 pwm maximum duty cycle (dcy maxpwm ) vs. temperature (c) dcy maxpwm (%) temperature (c) figure 21. opwm falling time figure 22. pwm maximum duty cycle
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 14 SG6901a ? ccm pfc / flyback pwm combination controller typical performance characteristics 1.15 1.17 1.19 1.21 1.23 1.25 -40 -25 -10 5 20 35 50 65 80 95 110 125 otp threshold voltage (v otp-off ) vs. temperature v otp-off (v) temperature (c) figure 23. v dd otpurn threshold voltage
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 15 SG6901a ? ccm pfc / flyback pwm combination controller functional description SG6901a is a highly integrated pfc/pwm combination controller. many functions and protections are built in to provide a compact design. the following sections describe the operation and function. switching frequency and current sources the switching frequency can be programmed by the resistor ri connected between ri pin and gnd. the relationship is: (khz) ) (k ? r 1560 f i osc = (1) for example, a 24k ? resistor r i results in a 65khz switching frequency. accordingly, a constant current, i t , flows through r i : (ma) ) (k ? r 1.2v i i t = (2) i t is used to generate internal current reference. line voltage detection (vrms) figure 24 shows a resistive divider with low-pass filtering for line-voltage detection on the vrms pin. the vrms voltage is used for the pfc multiplier, brownout protection, and range control. for brownout protection, SG6901a is disabled with a 195ms delay if the voltage vrms drops below 0.8v. for pfc multiplier and range control, refer to the pfc operation section below for details. figure 24. line voltage detection circuit interleave switching the SG6901a uses interleaved switching to synchronize the pfc and flyback stages, which reduces switching noise and spreads the emi emissions. figure 25 shows off-time, t off , inserted between the turn-off of the pfc gate drive and the turn- on of the pwm. for an universal input (90 ~ 264v ac ) power supply applying active boost pfc and flyback as a second stage, the output voltage of pfc is usually designed around 250v at low line and 390v at high line. this can improve the efficiency at low-line input. the range pin (open-drain structure) is us ed for the two-level output voltage setting. figure 25. interleaved switching pattern pfc operation the purpose of a boost active power factor corrector (pfc) is to shape the input current of a power supply. the input current waveform and phase follow that of the input voltage. average-current-mode control is utilized for continuous-current-mode operation for the pfc booster. with the innovative multi-vector control for voltage loop and switching charge multiplier-divider for current reference, excellent input power factor is achieved with good noise immunity and transient response. figure 26 shows the total control loop for the average-current-mode control circuit. the current source output fr om the switching charge multiplier-divider can be expressed as: () a v v i k i rms ea ac mo 2 = (3) as shown in figure 26, the current output from the imp pin is the summation of imo and imr1. imr1 and imr2 are identical fixed-current sources used to pull high the operating point of the imp and ipfc pins since the voltage across rs goes negative with respect to ground. constant current sources imr1 and imr2 are typically 60a. through the differential amplification of the signal across r s , better noise immunity is achieved. the output of iea is compared with an internal sawtooth and the pulse width for pfc is determined. through the average current-mode control loop, the input current i s is proportional to imo: s s 2 mo r i r i =
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 16 SG6901a ? ccm pfc / flyback pwm combination controller to achieve good power factor, the voltage for v rms and v ea should be kept as constant as possible, according to equation 5. good rc filtering for v rms and narrow bandwidth (lower than the line frequency) for voltage loop are suggested for better input current shaping. the transconductance error amplifier has output impedance zo and a capacitor c ea (1f ~ 10f) should be connected to ground. this establishes a dominant pole f1 for the voltage loop: ea o 1 c z 2 1 f = (5) the average total input power can be expressed as: ac ea 2 rms ea ac rms 2 rms ea ac rms mo rms (rms) in (rms) in r v 2 v v r vin v v v i v i v i v pin = = (6) from equation 6, v ea , the output of the voltage error amplifier, controls the total input power and the power delivered to the load. figure 26. average-current-mode control loop multi-vector error amplifier although the pfc stage has a low bandwidth voltage loop for better input power factor, the innovative multi- vector error amplifier provi des a fast transient response to clamp the overshoot and undershoot of the pfc output voltage. 0 shows the block diagram of the multi-vector error amplifier. when the variation of the feedback voltage exceeds 5% of the reference voltage, the transconductance error amplifier adjusts its output impedance to increase the loop response. figure 27. multi-vector error amplifier pfc over-voltage protection using a voltage divider from the output of pfc to the ovp pin, the pfc output voltage can be safely protected. once the voltage on the ovp pin is over ovppfc, the opfc is disabled. the opfc is not enabled again until the ovp voltage falls below ovppfc. cycle-by-cycle current limiting SG6901a provides cycle-by-cycle current limiting for both pfc and pwm stages. figure 28 shows the peak current limit for the pfc stage. the pfc gate drive is terminated once the voltage on the isense pin goes below v pk . the voltage of v rms determines the voltage of v pk . the relationship between v pk and v rms is shown in figure 28. the amplitude of the constant current, i p , is determined by the internal current reference according to: i p r 1.2v 2 i = (8)
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 17 SG6901a ? ccm pfc / flyback pwm combination controller figure 28. v rms controlled current limiting the peak current of the isense is given by (v rms <1.05v): s p p sense_peak r 0.2v - ) r (i i = (8) flyback pwm and slope compensation as shown in figure 29, peak -current-mode control is utilized for flyback pwm. the SG6901a inserts a synchronized 0.5v ramp at the beginning of each switching cycle. this built-in slope compensation ensures stable operation for continuous current-mode operation. when the ipwm voltage, across the sense resistor, reaches the threshold voltage (0.9v), the opwm is turned off after a small propagation delay t pd-pwm . to improve stability or prevent sub-harmonic oscillation, a synchronized positive-going ramp is inserted at every switching cycle. figure 29. peak current control loop limited power control every time the output of the power supply is shorted or overloaded, the fbpwm voltage increases. if the fbpwm voltage is higher than a designed threshold, fbopen-loop (4.5v) for longer than t open-pwm (56ms), the opwm is turned off. as long as the voltage on the vdd pin is larger than v dd-off (minimum operating voltage), the opwm is not enabled. this protection is reset every t open-pwm-hiccup interval. a low-frequency hiccup mode protection prevents the power supply from being overheated under overload conditions. over-temperature protection the otp pin provides for over-temperature protection. a constant current is output from this pin. if r i is equal to 24k ? , the magnitude of the constant current is 100a. an external ntc thermistor must be connected from this pin to ground, as shown as figure 30. when the otp voltage drops below v otp-off (1.2v), SG6901a is disabled and does not recover until otp voltage exceeds v otp-on (1.4v). figure 30. otp function soft start during startup of pwm stage, the ss pin charges an external capacitor with a constant current source. the voltage on fbpwm is clamped by the ss voltage during startup. in the event of a protected condition and/or pwm is disabled, the ss pin quickly discharges. gate driver SG6901a output stage is a fast totem-pole gate driver. the output driver is clamped by an internal 18v zener diode to protect the external power mosfet.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 18 SG6901a ? ccm pfc / flyback pwm combination controller physical dimensions 0.10 c c a see detail a notes: unless otherwise specified a) this package conforms to jedec ms-013, variation ac, issue e b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. e) landpattern standard: soic127p1030x265-20l pin one indicator 0.25 1 10 b ca m 20 11 b x 45 8 0 seating plane gage plane detail a scale: 2:1 seating plane land pattern recommendation f) drawing filename: mkt-m20brev3 0.65 1.27 2.25 9.50 13.00 12.60 11.43 7.60 7.40 10.65 10.00 0.51 0.35 1.27 2.65 max 0.30 0.10 0.33 0.20 0.75 0.25 (r0.10) (r0.10) 1.27 0.40 (1.40) 0.25 d) conforms to asme y14.5m-1994 figure 31. 20-pin small outline integrated circuit (soic) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6901a ? rev. 1.0.2 19 SG6901a ? ccm pfc / flyback pwm combination controller

▲Up To Search▲

Price & Availability of SG6901

	To Download SG6901 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .